Showing posts with label GAS. Show all posts
Showing posts with label GAS. Show all posts

Wednesday, April 4, 2012

back porting native_rdmsr_safe_regs

This function is used by new Linux kernels and I need to port it back to an old 2.6.9 kernel. The compiler complains that cannot find the reference to this function and its brother ( native_wrmsr_safe_regs).

Then I used vim/cscope to search symbols/text for native_wrmsr_safe_regs, but cannot find anything about it. Google it gave the same result. After some time, I used gitk to check the log of a related c file and found out these two functions are defined in an assembly file, by using macros.

Then I happily copied that assembly file (msr-reg.S) to the old kernel source. But this time I got some weird errors as "invalid character '(' in mnemonic". Then I google for this for some time and noticed that there is some definitions in "link/linkage.h". For example, ENTRY used in the msr-reg.S is defined there.

Finally I found out "ENDPROC" used in msr-reg.S is not in my version of linkage.h. After copy that definition, the compiler does not complain about these functions again.

Tuesday, November 16, 2010

SWITCH FROM REAL MODE TO PROTECTED MODE

http://blog.csdn.net/pengyang/archive/2009/03/10/3977909.aspx

http://blog.sina.com.cn/s/blog_414c0121010005o3.html

http://blog.chinaunix.net/u3/95743/showart.php?id=2286642

Intel CPU manual, 3A, chapter 9.9.1


1. Disable interrupts. A CLI instruction disables maskable hardware interrupts. NMI interrupts can be disabled with external circuitry. (Software must guarantee that no exceptions or interrupts are generated during the mode switching operation.)
2. Execute the LGDT instruction to load the GDTR register with the base address of the GDT.
3. Execute a MOV CR0 instruction that sets the PE flag (and optionally the PG flag) in control register CR0.
4. Immediately following the MOV CR0 instruction, execute a far JMP or far CALL instruction. (This operation is typically a far jump or call to the next instruction in the instruction stream.)
5. The JMP or CALL instruction immediately after the MOV CR0 instruction changes the flow of execution and serializes the processor.